The new generations of integrated circuits have several levels of copper based interconnections made using Damascene technology. Complementary Metal Oxide Semi-conductor (CMOS) image sensor type integrated circuits generally include, in addition to the various copper based interconnection levels, a last aluminum based metal level, that may be dedicated to the assembly, for example, by welding, of the integrated circuit with a circuit package, and/or to the testing of the integrated circuit.
In FIG. 1, an example of an image sensor device of the prior art is shown. This device has 4 levels of interconnections, L1, L2, L3, L4, of which 3 levels, L1, L2, L3, are formed by copper based interconnections. A last level, L4, is aluminum based. The first level features interconnection lines 10a positioned opposite the active matrix pixels (shown by a block reference 50) of the sensor, interconnection lines 10b positioned opposite one or several processing and/or command analog and/or digital circuits (shown by a block reference 52), and interconnection lines 10c opposite an interface circuit (shown by a block reference 54).
The second level L2 features interconnection lines 20a positioned opposite the pixels, as well as interconnection lines 20b positioned opposite the circuits 52. Interconnection lines 20c are positioned opposite the circuit 54 dedicated to testing. The third level L3 features interconnection lines 30a positioned opposite the active matrix pixels 50, interconnection lines 30b positioned opposite the several circuits 52, and interconnection lines 30c opposite a circuit equipped with dedicated components, for example, for testing the sensor.
The last level L4 of interconnections includes aluminum based pads 40 created on the periphery of the sensor, and positioned opposite the electrical interface circuit 54. This last level L4 poses a problem, as shown in FIG. 1, in that the dielectric layer and the passivated layer 62 covering the four metallic levels, L1, L2, L3, L4, are not flat. This lack of flatness may lead to non-uniformity in the thickness of the color filter 64, made, for example, by spin coating a colored resin onto the passivated layer 62. Filters of different thicknesses induce a non-uniform optical response from the sensor.
To overcome this problem, a method may be used which deposits an additional dielectric thickness followed by CMP (Chemical Mechanical Polishing). However, the additional dielectric thickness increases the distance between the micro-lenses 66 on the color filter and the photodiodes of the active matrix 50, which causes a drop in the optical performances of the device, especially in terms of quantum efficiency, crosstalk, and angular response.